The production of bipolar transistors assembled with standard CMOS transistors within a semiconductor substrate or a silicon-on-insulator (SOI) substrate makes it possible at the present time to obtain integrated circuits of high electrical performance. Bipolar transistor architectures are preferably characterized at the present time by a double emitter/base/collector heterojunction of the polysilicon/carbon-containing SiGe alloy/silicon type. Bipolar transistors having such architectures may be used in the high-frequency field, especially for frequencies above 50 GHz.
The electrical performance of bipolar transistors is generally determined from the measurement of the transition frequency of the transistor as a function of the breakdown voltage of the emitter/collector junction. This breakdown voltage represents the maximum voltage above which the transistor passes into the avalanche regime.
Results obtained from these measurements show, for a given concentration of dopant species in the region of the collector, that when a bipolar transistor is used at high frequencies, it has a low breakdown voltage. Thus, a transistor has in particular, for frequencies between 50 GHz and 70 GHz, a low breakdown voltage of between 2 and 3 volts. Conversely, these results show that by lowering the concentration of dopant species in the region of the collector, a bipolar transistor having higher breakdown voltages is obtained, but this can be used only at low frequencies, especially below 30 GHz. Such a transistor may thus have, for frequencies between 20 GHz and 30 GHz, a higher breakdown voltage of between 6 and 7 volts. Such results are particularly described in the scientific article “Vertical SiGe-base bipolar transistors on CMOS-compatible SOI substrate”, IBM, BCTM 2003.
It has thus been envisaged to produce bipolar transistors having an architecture for obtaining a compromise between operating at high frequencies and being able to withstand high voltages. One of these architectures includes in particular producing a bipolar transistor having a collector region that is not uniformly doped but gradually doped laterally. Specifically, it has been determined that such doping has an influence on the transition frequency and on the breakdown voltage of a bipolar transistor.
However, producing such an architecture has the drawback of using additional masks so as to localize, beneath the base of the transistor, the zone of the collector region that it is desired to dope laterally in a gradual manner. Thus, such a process has the drawback of imposing excessively severe alignment constraints during the photolithography steps. Furthermore, the transition frequencies and the breakdown voltage of a transistor vary according to the misalignment of the masks used during this process, making it particularly difficult to produce a gradually doped collector in a conventional manner. Such a process also incurs a cost increase in fabricating an integrated circuit, due to the use of additional masks.